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 * this software without specific prior written permission.
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#include "arch/arm/fastmodel/iris/isa.hh"

#include "arch/arm/regs/misc.hh"
#include "base/logging.hh"
#include "cpu/thread_context.hh"
#include "sim/serialize.hh"

namespace gem5
{

void
Iris::ISA::serialize(CheckpointOut &cp) const
{
    RegVal miscRegs[ArmISA::NUM_PHYS_MISCREGS];
    for (int i = 0; i < ArmISA::NUM_PHYS_MISCREGS; i++)
        miscRegs[i] = tc->readMiscRegNoEffect(i);
    SERIALIZE_ARRAY(miscRegs, ArmISA::NUM_PHYS_MISCREGS);
}

void
Iris::ISA::copyRegsFrom(ThreadContext *src)
{
    panic("copyRegsFrom not implemented");
}

} // namespace gem5
